姓名     沈添賜

職稱      講師

電話      1980

E-mail    Email住址會使用灌水程式保護機制。你需要啟動Javascript才能觀看它

學經歷    清華大學資訊工程所博士()

授課領域  電路學、電子學、程式語言

領域專長  半導體封裝、人工智慧

 

【期刊暨研討會論文】

1.Jian-Ming Chen, Chi-Hao Lo, Mu-Chun Wang*, Tien-Szu Shen, Ching-Chuan Chou, Wen-Shiang Liao, Wen-How Lan, “Comparison of Degradation and Recovery of SiONx and Hf-based Dielectric under Electrical-field Stress,” International Congress on Advanced Materials Sciences and Engineering 2019 (ICAMSE2019), July 22-24, Osaka, Japan.

2.Mu-Chun Wang*, Tien-Szu Shen, Hui-Yun Bor, Chao‐Nan Wei, Wen‐Shiang Liao and Wen-How Lan, “Punch-through and DIBL Effects Exposing Nano-node SOI FinFETs under Heat Stress,” IEEE 26th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA2019), PID:330, July 02-05, Hangzhou, China.

3.Tien-Szu Shen, Ching-Chuan Chou, Mu-Chun Wang, Wen-Shiang Liao, Ting-Wei Chao, Wen-

How Lan, “Electrical Characteristics of n-type FinFETs under VT Ion Implantation on SOI

Substrate,” (Accepted) IEEE Transactions on Plasma Science, Oct. 2018. (SCI IF2017: 1.253)

4.Tien-Szu Shen, Jian-Ming Chen, De-Cheng Zhang, Chun-Chieh Yang, Wen-Shiang Liao, Chi-

Hao Lo, Wen-How Lan, Mu-Chun Wang*, “DIBL Effect for Nano-node p-type FinFETs under

Thermal Stress,” (Accepted) 2018 International Electron Devices & Materials Symposium

(IEDMS 2018), PID:158, Nov. 14-16, Keelung City, Taiwan.

5.Shea-Jue Wang, Mu-Chun Wang*, Shih-Fan Chen, Yu-Hsiang Li, Tien-Szu Shen, Hui-Yun Bor,

Chao-Nan Wei, “Electrical and physical characteristics of WO3/Ag/WO3 sandwich structure

fabricated with magnetic-control sputtering metrology,” Sensors, Aug. 2018. (SCIE IF2017: 2.475)

6.Zhiming Wang, Tien-Szu Shen, Wei-Cheng Wang, Ting-Wei Chao, Zi-Jun Xie, Wen-Shiang

Liao, Mu-Chun Wang*, “Drive Current Behaviors of Multi N-channel FinFETs under Different

VT Implant Energies,” (Accepted) IEEE ISNE 2018, PID: 8049, May 2018, Taipei, Taiwan.

7.Ting-Wei Chao, Tien-Szu Shen, Chii-Ruey Lin, Chia-Hsien Chang, Wen-Shiang Liao, Wen-

How Lan, Mu-Chun Wang*,“GIDL Effect Observed in FinFET Shapes and VT Implant

Energy,”(Accepted) IEEE ISNE 2018, PID:8107, May 2018,Taipei, Taiwan. 

 

 

 

產學合作與研究計畫

  • 科技部產學合作計畫-開發型:功率元件防護層之超高頻電漿薄膜沉積技術,經費: NT$680萬元,執行期程自108年11月1日起至111年10月31日止 (共同主持人; 主持人: 林啟瑞)
  • 產學計畫: AOI-AI雲端檢測系統開發-智慧鞋業,計畫編號: 產(工)108-0029,經費: NT$ 510,000,2019/9月~ 2020/4月(共同主持人; 主持人: 王木俊).
  • 產學計畫: 半導體檢測設備智慧化與國產化-II-產(工)108-0031,經費: NT$ 600,000,2019/8月~ 2020/4月(共同主持人; 主持人: 張丞勛).
  • 產學計畫: 網路行銷AI系統開發建置-I-產(工)108-0032,經費: NT$ 600,000,2019/9月~ 2020/1月(計畫主持人).
  • 產學計畫: 以AI成像技術導入水電水管管理之可行性評估-產(工)109-0002,經費: NT$ 50,000,2020/1月~ 2020/3月(計畫主持人).
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